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| DM74LS377 Octal D-Type Flip-Flop with Common Enable and Clock October 1988 Revised March 2000 DM74LS377 Octal D-Type Flip-Flop with Common Enable and Clock General Description The DM74LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common input enable. The device is packaged in the space-saving (0.3 inch row spacing) 20-pin package. Features s 8-bit high speed parallel registers s Positive edge-triggered D-type flip-flops s Fully buffered common clock and enable inputs Ordering Code: Order Number DM74LS377WM DM74LS377N Package Number M20B N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Logic Symbol Connection Diagram VCC = Pin 20 GND = Pin 10 Pin Descriptions Pin Names E D0-D7 CP Q0-Q7 Description Enable Input (Active LOW) Data Inputs Clock Pulse Input (Active Rising Edge) Flip-Flop Outputs Truth Table Inputs E H L L CP Dn X H L Output Qn No Change H L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial X (c) 2000 Fairchild Semiconductor Corporation DS009831 www.fairchildsemi.com DM74LS377 Functional Description The DM74LS377 consists of eight edge-triggered D flip-flops with individual D inputs and Q outputs. The Clock (CP) and Enable input (E) are common to all flip-flops. When E is LOW, new data is entered into the register on the next LOW-to-HIGH transition of CP. When E is HIGH, the register will retain the present data independent of the CP. Logic Diagram www.fairchildsemi.com 2 DM74LS377 Absolute Maximum Ratings(Note 1) Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range 7V 7V 0C to +70C -65C to +150C Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL TA tS (H) tS (L) tH (H) tH (L) tS (H) tS (L) tH (H) tH (L) tW (H) tW (L) Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Free Air Operating Temperature Setup Time HIGH or LOW Dn to CP Hold Time HIGH or LOW Dn to CP Setup Time HIGH or LOW E to CP Hold Time HIGH or LOW E to CP CP Pulse Width HIGH or LOW 0 10 10 5.0 5.0 10 20 5.0 5.0 20 20 Parameter Min 4.75 2 0.8 -0.4 8 70 Nom 5 Max 5.25 Units V V V mA mA C ns ns ns ns ns Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH VOL Parameter Input Clamp Voltage HIGH Level Output Voltage LOW Level Output Voltage II IIH IIL IOS ICC Input Current @ Max Input Voltage HIGH Level Input Current LOW Level Input Current Short Circuit Output Current Supply Current Conditions VCC = Min, II = -18 mA VCC = Min, IOH = Max VIL = Max VCC = Min, IOL = Max VIH = Min IOL = 4 mA, VCC = Min VCC = Max, VI = 7V VI = 10V VCC = Max, VI = 2.7V VCC = Max, VI = 0.4V VCC = Max (Note 3) VCC = Max -20 2.7 3.4 0.35 0.25 0.5 0.4 0.1 20.0 -0.4 -100 28 mA A mA mA mA Min Typ (Note 2) Max -1.5 Units V V V Note 2: All typicals are at VCC = 5V, TA = 25C. Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second. Switching Characteristics VCC = +5.0V, TA = +25C Symbol fMAX tPLH tPHL Parameter Maximum Clock Frequency Propagation Delay CP to Qn RL = 2 k, CL = 15 pF Min 30 25 25 Max MHz ns Units 3 www.fairchildsemi.com DM74LS377 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B www.fairchildsemi.com 4 DM74LS377 Octal D-Type Flip-Flop with Common Enable and Clock Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 5 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com |
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